Faculty advisor

Mark Horowitz
Gates 306
Interests: VLSI, Architecture, Biology, Microfluidics

Mark Horowitz received his BS and MS in Electrical Engineering from MIT in 1978, and his PhD from Stanford in 1984. Since 1984 he has been a professor at Stanford working in the area of digital integrated circuit design. While at Stanford he has led a number of processor designs including MIPS-X, one of the first processors to include an on-chip instruction cache, Torch, a statically-scheduled, superscalar processor and Flash, a flexible DSM machine. He has also worked in a number of other chip design areas including high-speed memory design, high-bandwidth interfaces, and fast floating point. In 1990 he took leave from Stanford to help start Rambus Inc, a company designing high-bandwidth memory interface technology.

Postdocs and staff

Byong Chan Lim
Gates 318
Interests: Mixed-signal design methodology, mixed-signal circuits

Byong Chan Lim is an engineering research associate in the Department of Electrical Engineering, Stanford University. Under the supervision of Prof. Mark Horowitz, he has been conducting research on mixed-signal circuit design and methodologies to improve the productivity of mixed-signal SoC design and validation. He received his PhD in Electrical Engineering from Stanford University, in 2012. Before joining the group, from 2003~2007, he had worked on developing various analog IPs/Chips such as high-speed link, PLL(DLL), Image processor, and so on for LG Electronics Inc.

Stephen Richardson
Gates 456
Interests: Computer Architecture, Compilers, VLSI

Dr. Richardson, a long-time graduate of Stanford’s PhD program, authored Sun Microsystems’ first technical report. Later, he helped launch Micro Magic (www.micromagic.com), a processor design and design-tool consulting firm. Dr. Richardson has also worked at HP research labs, where he headed up a large-ish team of hardware-oriented computer architects. Recent work at Stanford has included reswearch on elegant solutions for conflict-free placement of FFT datapoints in local memory.


Steven Bell
Gates 320
Interests: Computational photography, computer vision, software systems

I’m working on the Frankencamera project, where we are building an open platform for computational photography research. I’m interested in image processing, computer vision, and computational photography - using computation to expand the limits of imaging systems. I particularly enjoy working at the intersection of hardware, software, and theory, where the math produces a beautiful and tangible result. I received my B.S. in Computer Engineering from Oklahoma Christian University in 2011.

Nikhil Bhagdikar
Gates 322
Interests: Computer Architecture, VLSI

Alex Carsello
Gates 302
Interests: Computer Architecture, VLSI, Image Processing, Chip Generators

Alex received a B.S. in Electrical and Computer Engineering from Washington University in St. Louis in 2017, and he is currently a Ph.D. student in Electrical Engineering at Stanford University. He is interested in reconfigurable computing, domain-specific architectures for image processing, and hardware design methodology. He is currently working within the AHA Agile Hardware Project on a next-generation CGRA (coarse-grained reconfigurable architecture) chip generator.

Heonjae Ha
Gates 318
Interests: VLSI, Design Validation Methodologies

Heonjae received his B.Eng. from Korea University in 2006 and his MS from Stanford University in 2009. He is a PhD student in Electrical Engineering at Stanford University since 2013. Prior to his PhD studies he worked at SK Hynix, where he collaboratively designed LPDDR2 Mobile DRAMs and did design validation of various Mobile DRAMs. His current research interests include enenrgy efficient memory design and design validation methodologies.

Steven Herbst
Gates 322
Interests: Analog/Mixed-Signal Circuit Design, VLSI, Design Automation, Circuit Simulation, Design Verification

Steven Herbst is working to broaden participation in mixed-signal integrated circuit design through research in design automation, simulation methods, and verification algorithms. Prior to becoming a PhD student at Stanford, he was an engineer at Apple (2013-2016) and Intersil (2011-2013). Steven holds B.S. and M.Eng. degrees in EE from MIT (2010, 2011).

Zachary Myers
Gates 330
Interests: Electronics, Mixed Signal IC Design, uFluidics

Zach is a EE PhD student. He received a B.S. in EE from UC Davis in 2013. He is interested in non-traditional substrates for electronics, cutting edge mixed signal design and open hardware.

Jeff Setter
Gates 356
Interests: computer architecture, image processing, VLSI

Jeff received a B.S. in Electrical and Computer Engineering from Cornell University in 2015. He is currently a Ph.D. candidate in Electrical Engineering at Stanford University. He is currently working on the Frankencamera project, an FPGA-based image-processing camera; and Halide2Hardware, a compiler from an image-processing DSL to hardware RTL.

Artem Vasilyev
Gates 320
Interests: Computer Architecture, Compilers, VLSI

Jing Xiong
Gates 320
Interests: Image processing, computer vision, and related applications such as neuroimaging.

Jing Xiong is a Ph.D. student at Electrical Engineering department at Stanford University. She received her BS in Electrical Engineering from University of Minnesota Twin Cities with Summa Cum Laude and high distinction. She is currently working on a brain mapping project.

Xuan Yang
Gates 356
Interests: Computer Architecture, Deep Learning, Compiler

Xuan Yang is a Ph.D student at Electrical Engineering department at Stanford University. She is working on an systematic framework to analyze the design space of Deep Neural Network (DNN) accelerators, including the design choices of dataflow, loop transformation and resource allocation. Besides, she is working on developing an automatic hardware generation toolchain that can generate DNN accelerators from Halide. Her research interests lie in the area of computer architecture and systems, focusing on energy-efficient and high-performance acceleration for deep learning, computer vision based applications.

Keyi Zhang
Gates 356
Interests: Computer Systems, Machine Learning, FPGA PnR

Keyi Zhang is a PhD student in Computer Science at Stanford University. He is currently working on efficient FPGA place and route algorithms. He received a B.S. in Computer Science and Engineering from Bucknell University.


Also see experimental alumni prototype page.

Amy Fritz | http://stanford.edu/~avfritz
Blaine Rister | http://stanford.edu/~blaine
Feiqiao Brian Yu | http://brianyu.org
Andrew Danowitz |
John Brunhaver | http://graphics.stanford.edu/~jbrunhav
Jonathan Leaf | http://stanford.edu/~jcleaf
Jing Pu | https://www.linkedin.com/in/jingpu
Kahye Song |
Sabrina Liao |
Megan Wachs | http://meganwachs.com
Mehmet Ozan Kabak | http://stanford.edu/~ozank
Ardavan Pedram | http://www.cs.utexas.edu/~ardavan/
Rayfe Gaspar-Asaoka |
Shahar Kvatinsky | http://webee.technion.ac.il/people/skva/
Suyao Ji | http://stanford.edu/~suyao
Zain Asgar |