Faculty advisor

Mark Horowitz
650-725-3707
Gates 442
Interests: VLSI, Architecture, Biology, Microfluidics

Mark Horowitz received his BS and MS in Electrical Engineering from MIT in 1978, and his PhD from Stanford in 1984. Since 1984 he has been a professor at Stanford working in the area of digital integrated circuit design. While at Stanford he has led a number of processor designs including MIPS-X, one of the first processors to include an on-chip instruction cache, Torch, a statically-scheduled, superscalar processor and Flash, a flexible DSM machine. He has also worked in a number of other chip design areas including high-speed memory design, high-bandwidth interfaces, and fast floating point. In 1990 he took leave from Stanford to help start Rambus Inc, a company designing high-bandwidth memory interface technology.

Postdocs and staff

Stephen Richardson
Gates Building
Interests: Computer Architecture, Compilers, VLSI

Dr. Richardson, a long-time graduate of Stanford’s PhD program, authored Sun Microsystems’ first technical report. Later, he helped launch Micro Magic (www.micromagic.com), a processor design and design-tool consulting firm. Dr. Richardson has also worked at HP research labs, where he headed up a large-ish team of hardware-oriented computer architects. Work at Stanford has included research on elegant solutions for conflict-free placement of FFT datapoints in local memory, and separately, process-independent chip design and testing.

Students

Nikhil Bhagdikar
Gates 322
Interests: Computer Architecture, VLSI

Alex Carsello
Gates 302
Interests: Computer Architecture, VLSI, Image Processing, Chip Generators

Alex received a B.S. in Electrical and Computer Engineering from Washington University in St. Louis in 2017, and he is currently a Ph.D. student in Electrical Engineering at Stanford University. He is interested in reconfigurable computing, domain-specific architectures for image processing, and hardware design methodology. He currently works within the AHA Agile Hardware Project on a next-generation CGRA (coarse-grained reconfigurable architecture) chip generator.

Taeyoung Kong
Gates 356
Interests: Computer Architecture, VLSI

Taeyoung received a B.S. in Electrical and Computer Engineering from Seoul National University in 2017, and he is currently a Ph.D. student in Electrical Engineering at Stanford University. He is interested in hardware accelerator for deep learning and image processing and hardware design methodology. He is currently working within the AHA Agile Hardware Project.

Qiaoyi (Joey) Liu
Gates 302
Interests: Reconfigurable Computer Architecture, Efficient Deep Learning, Compiler

Qiaoyi(Joey) is a PhD student in Electrical Engineering Department at Stanford. He is working on agile hardware design methodology, generating computer vision / machine learning hardware from domain specific language, Halide. His research interests include high level synthesis, memory mapping compiler and domain-specific architecture.

Zachary Myers
Allen
Interests: Electronics, Mixed Signal IC Design

Zach is a EE PhD student. He received a B.S. in EE from UC Davis in 2013. He is interested in High-Speed Links and Open Source Hardware.

Jeff Setter
Gates 356
Interests: computer architecture, image processing, compilers

Jeff received a B.S. in Electrical and Computer Engineering from Cornell University in 2015. He is currently a Ph.D. candidate in Electrical Engineering at Stanford University. He is working on Halide2Hardware, an extension to a Halide’s DSL compiler to hardware RTL for image processing and machine learning applications.

Kavya Sreedhar
Gates 302
Interests: Computer Architecture, VLSI

Kavya is a PhD Student in EE at Stanford University. She received a B.S. in EE and BEM (Business, Economics, & Management) from Caltech in 2019.

Daniel Stanley
Gates
Interests: Electronics, Mixed Signal IC Design, Robotics, Design Productivity

Daniel is a PhD student currently working on tools for validating mixed-signal systems. He received his bachelor’s degree from Princeton University in 2018. His research interests include designing analog and digital hardware as well as creating tools that make hardware design faster and easier.

Recent Alumni

Click here for full list of all Mark's alumni students.

Amy Fritz http://stanford.edu/~avfritz
Andrew Danowitz
Ardavan Pedram http://www.cs.utexas.edu/~ardavan/
Artem Vasilyev
Blaine Rister http://stanford.edu/~blaine
Feiqiao Brian Yu http://brianyu.org
Byong Chan Lim http://web.stanford.edu/~bclim
Heonjae Ha https://www.linkedin.com/in/heonjae-ha-276394100
Jing Pu https://www.linkedin.com/in/jingpu
Jing Xiong http://web.stanford.edu/~jxiong1/
John Brunhaver http://graphics.stanford.edu/~jbrunhav
Jonathan Leaf http://stanford.edu/~jcleaf
Kahye Song
Keyi Zhang https://keyizhang.com
Megan Wachs http://meganwachs.com
Mehmet Ozan Kabak http://stanford.edu/~ozank
Rayfe Gaspar-Asaoka
Sabrina Liao
Shahar Kvatinsky http://webee.technion.ac.il/people/skva/
Steven Bell http://stanford.edu/~sebell
Steven Herbst http://stanford.edu/~sherbst
Sung-Jin Kim https://www.linkedin.com/in/sung-jin-kim/
Suyao Ji http://stanford.edu/~suyao
Xuan Yang http://stanford.edu/~xuany
Zain Asgar