Date Author Thesis
Jun 2004 Kurt Akeley Achieving Near-Correct Focus Cues Using Multiple Image Planes
May 2010 Fernando Amat Gil Alignment Of Cryo-Electron Tomography Images Using Markov Random Fields
Aug 2008 Valentin Abramzon Analog-To-Digital Converters For High-Speed Links
Aug 2011 Zhengyun Zhang Analysis And Synthesis Of Three-Dimensional Illumination Using Partial Coherence
Mar 1991 Don Stark Analysis Of Power Supply Networks In VLSI Circuits
Dec 2003 David J. Lie Architectural Support For Copy And Tamper-Resistant Software
May 1989 James A. Gasbarro An Architecture for High-Performance Cingle-Chip VLSI Testers
Dec 2013 Rehan Hameed Balancing Efficiency And Flexibility In Specialized Computing
Mar 2008 David Black-Schaffer Block Parallel Programming For Real-Time Applications On Multi-Core Processors
Nov 2011 Chung Chun Wan CMOS Image Sensors With Multi-Bucket Pixels For Computational Photography
Oct 1992 Richard Simoni Cache Coherence Directories For Scalable Multiprocessors
Sep 2004 Vladimir Stojanovic Channel-Limited High-Speed Links: Modeling, Analysis And Design
Sep 2007 Vicky W. Wong Characterizing The Parallel Performance And Soft Error Resilience Of Probabilistic Inference Algorithms
May 2011 Ofer Shacham Chip Multiprocessor Generator: Automatic Generation Of Custom And Heterogeneous Compute Platforms
May 2013 James Mao Circuitbook: A Framework For Analog Design Reuse
Mar 2004 Neel S. Joshi Color Calibration For Arrays Of Inexpensive Image Sensors
Feb 2003 Ujval J. Kapasi Conditional Techniques For Stream Processing Kernels
Jun 2001 William F. Ellersick Data Converters For High Speed CMOS Links
Aug 1999 Bharadwaj S. Amrutur Design And Analysis Of Fast Low Power Srams
Jun 2005 Ken Mai Design And Analysis Of Reconfigurable Memories
Oct 1989 Mark Ronald Santoro Design And Clocking Of VLSI Multipliers
Aug 2013 Frances Wing Yee Lau Design And Development Of A 1mm Resolution Clinical Positron Emission Tomography (PET) System
Aug 2010 Omid Jalal Azizi Design And Optimization Of Processors For Energy Efficiency: A Joint Architecture-Circuit Approach
Aug 1999 Kun-Yung Chang Design Of A CMOS Asymmetric Serial Link
Dec 2002 Jaeha Kim Design Of CMOS Adaptive-Supply Serial Links
Aug 2004 Azita Emami-Neyestanak Design Of CMOS Receivers For Parallel Optical Interconnects
Jan 2002 Evelina Fai-Yee Yeung Design Of High-Performance And Low-Cost Parallel Links
Sep 2007 Samuel Palermo Design Of High-Speed Optical Interconnect Transceivers
Dec 1998 Chih-Kong Ken Yang Design Of High-Speed Serial Links In CMOS
Mar 2008 Dinesh Patil Design Of Robust Energy-Efficient Digital Circuits Using Geometric Programming
Jun 2001 Matthew Eldridge Designing Graphics Architectures Around Scalability And Communication
Jul 2006 Ren Ng Digital Light Field Photography
Jul 2013 Limor Freifeld Dissecting The Neural Circuits Of Early Visual Processing In Drosophila
Dec 2011 Ray Nguyen Dynamic Amplifiers For High-Speed Pipelined A/D Conversion
Aug 2001 Ming-Ju Edward Lee An Efficient I/O And Clock Recovery Design For Terabit Integrated Circuits
Sep 2006 Gaurav Garg Efficiently Acquiring Reflectance Fields Using Patterned Illumination
Nov 2012 Sameh Galal Energy Efficient Floating-Point Unit Design
Aug 2013 Krishna Teja Malladi Energy Proportional Memory Systems
Jun 2001 Gu-Yeon Wei Energy-Efficient I/O Interface Design With Adaptive Power-Supply Regulation
Dec 2008 Bita Nezamfar Energy-Performance Tunable Digital Circuits
Nov 2006 Hae-Chang Lee An Estimation Approach To Clock And Data Recovery
Apr 2008 Jacob C. Chang Formal Verification Along With Design For Transactional Models
Dec 2003 Dean Liu A Framework For Designing Reusable Analog Circuits
Feb 2011 Eino-Ville Aleksi Talvala The Frankencamera: Building A Programmable Camera For Computational Photography
Aug 2010 Farshid Moussavi Geometric Context Driven Inference For High Throughput Cryogenic Electron Tomography
Dec 2004 Bennett Wilburn High Performance Imaging Using Arrays Of Inexpensive Cameras
Apr 1998 Stefanos Sidiropoulos High Performance Inter-Chip Signalling
Jul 2011 Andrew B. Adams High-Dimensional Gaussian Filtering For Computational Photography
Mar 2008 John Kim High-Radix Interconnection Networks
Jan 1995 Drew Eric Wingard High-Speed BiCMOS Memories
Aug 2008 Xiling Shen Hybrid Modeling And Robustness Analysis Of Cell Cycle Regulation
Aug 2001 Lance Stirling Hammond Hydra: A Chip Multiprocessor With Support For Speculative Thread-Level Parallelization
May 1993 Arturo Salz Incremental Tools For The Design And Verification Of VLSI Circuits
Aug 1990 Ted Williams Latency And Throughput Tradeoffs In Self-Timed Speed-Independent Pipelines And Rings
May 2004 Isaac Keslassy The Load-Balanced Router
Mar 2005 Aparna Bhatnagar Low Jitter Clocking Of CMOS Electronics Using Mode-Locked Lasers
Jun 1997 Ricardo E. Gonzalez Low-Power Processor Design
Dec 2006 Elad Alon Measurement And Regulation Of On-Chip Power Supply Noise
Nov 2007 James Alden Weaver Measuring Supply Currents in Printed Circuit Boards
Sep 2005 Nuwan S. Jayasena Memory Hierarchy Design For Stream Computing
Jun 2004 Jeffrey S. Gibson Memory Profiling On Shared-Memory Multiprocessors
Nov 2011 Metha Jeeradit Mixed Equation-Simulation Circuit Optimization
Dec 2012 Byong Chan Lim Model Validation Of Mixed-Signal Systems
Mar 2008 Amir Amirkhany Multi-Carrier Signaling For High-Speed Electrical Links
Sep 2006 Augusto Roman Multiperspective Imaging For Automated Urban Visualization
Nov 1995 Thomas Stephen Chanak Netlist Processing For Custom VLSI Via Pattern Matching
Aug 2003 Ron Ho On-Chip Wires: Scaling And Efficiency
Dec 2005 Manohar Karkal Prabhu Parallel Programming Using Thread-Level Speculation
May 2000 Hema Kapadia Partitioning-Driven Convergence in the Design of Random-Logic Blocks
Dec 2004 Robert C. Kunz Performance Bottlenecks On Large-Scale Shared-Memory Multiprocessors
Dec 2002 Jeff Solomon Physical Design Datasets
Jun 1992 Russell Kao Piecewise Linear Models For Switch-Level Simulation
Dec 2008 Alexandre Solomatnikov Polymorphic Chip Multiprocessor Architecture
Jun 1994 John George Maneatis Precise Delay Generation Using Coupled Oscillators
Nov 2001 Daniel K. Weinlader Precision CMOS Receivers For VLSI Testing Applications
Jul 2007 Patrick Chiang Precison Clock Synthesis Using Direct Modulation Of Front-End Multiplexers/Demultiplexers In High Speed Serial Link Transceivers
Dec 2006 Alessandro Magnani Primal-Dual Cutting-Plane Method For Distributed Design
Sep 2005 Elizabeth Seamans Processor Efficiency For Packet-Processing Applications
Feb 2009 Michael D. Linderman A Programming Model And Processor Architecture For Heterogeneous Multicore Computers
Mar 2004 Timothy John Purcell Ray Tracing On A Stream Processor
Jun 1992 Mark Edward Dean STRiP: A Self-Timed RISC Processor
Mar 2012 James Chen Self-Calibrating On-Chip Interconnects
May 1991 Ted Eugene Williams Self-Timed Rings And Their Application To Division
Feb 1999 David Harris Skew-Tolerant Circuit Design
Dec 2008 Amin Firoozshahian Smart Memories: A Reconfigurable Memory System Architecture
Jun 2013 Megan A. Wachs Specifying And Validating Memory Protocols For Chip Generators
Jun 2008 Francois Labonte A Stream Virtual Machine
Jun 1989 William M. Johnson Super-Scalar Processor Design
Nov 1992 Michael David Smith Support For Speculative Execution In High-Performance Processors
Oct 2001 James Christopher Wilson Symbolic Simulation using automatic abstraction of internal node values
Mar 2007 Vaibhav Vaish Synthetic Aperture Imaging Using Dense Camera Arrays
Jan 1984 Mark Alan Horowitz Timing Models For MOS Circuits
Jun 2003 Brucek Khailany The VLSI Implementation And Evaluation Of Area- And Energy-Efficient Streaming Media Processors
Nov 1996 Chian-Min Richard Ho Validation Tools For Complex Digital Designs

Notes: Click on triangles to sort columns.
For dev tools see Steve R. and/or "~steveri/webpage/mh-theses/"