| 0 |
Boosting beyond static scheduling in a superscalar processor |
M. Smith, M. Lam, M. Horowitz |
1990 |
article |
|
| 1 |
A single-ended BiCMOS sense circuit for digital circuits |
G. Rosseel, M. Horowitz, R. Dutton, R. Cline |
1989 |
article |
|
| 2 |
SPIM: A pipelined 64x64b iterative multiplier |
M. Santoro, M. Horowitz |
1989 |
article |
|
| 3 |
Integrated pin electronics for VLSI functional testers |
J. Gasbarro, M. Horowitz |
1989 |
article |
|
| 4 |
Limits on multiple instruction issue |
M. D. Smith, M. Johnson, M. Horowitz |
1989 |
article |
|
| 5 |
A pipelined 64x64b iterative array multiplier |
M. Santoro, M. Horowitz |
1988 |
article |
|
| 6 |
A 4-ns 4K*1-bit two-port BiCMOS SRAM |
T. Yang, M. Horowitz, B. Wooley |
1988 |
article |
|
| 7 |
A single-chip functional tester |
J. Miyamoto, M. Horowitz |
1987 |
article |
|
| 8 |
A 32 b microprocessor with on-chip 2 Kbyte instruction cache |
M. Horowitz, J. Hennessy, P. Chow, P. Gulak, J. Acken, A. Agarwal, C. Chu, S. McFarling, S. Przybylski, S. Richardson, A. Salz, R. Simoni, D. Stark, P. Steenkiste, S. Tjiang, M. Wing |
1987 |
article |
|
| 9 |
MIPS-X: a 20-MIPS peak, 32-bit microprocessor with on-chip cache |
M. Horowitz, P. Chow, D. Stark, R. Simoni, A. Salz, S. Przybylski, J. Hennessy, G. Gulak, A. Agarwal, J. Acken |
1987 |
article |
|
| 10 |
A single-chip LSI high-speed functional tester |
J. Miyamoto, M. Horowitz |
1987 |
article |
|
| 11 |
Timing models for MOS circuits |
M. Horowitz |
1983 |
phdthesis |
|
| 12 |
Robust Energy-Efficient Adder Topologies |
Dinesh Patil, Omid Azizi, Ron Ho, Rajesh Ananthraman, Mark Horowitz |
0000 |
conference |
|
Papers
