Hacks

Name Description
checkMagicLabels Checks there are no labels that differ only in capitalization and which are not physically connected. Also checks that all Vdd and Gnd nodes are physically connected.
rsimverilog.pl Runs Verilog and IRSIM simultaneously and parses the output to find assertion failures. Commands are passed to IRSIM through a pipe eliminating the need for huge command files.


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